Programme

P.39 -- Poster, VCTP-45

Date: Tuesday, 13 October 2020

Time: 08:30 - 10:00

Device Physics and Design of InAs Line-Tunneling Field-Effect Transistors with Laterally Doped Pocket

Nguyen Dang Chien (1), Chun-Hsing Shih (2)

(1) Faculty of Physics and Nuclear Engineering, Dalat University, Lam Dong 670000, Vietnam; (2) Department of Electrical Engineering, National Chi Nan University, Nantou 54561, Taiwan

Related to the extension of the tunneling region, the line-tunneling architecture is known as the most effective method to enlarge the tunneling area in tunnel field-effect transistors (TFETs). Based on two-dimensional simulations with experimentally calibrated model parameters, this work examined the mechanism of laterally doped pocket in enhancing the on-off characteristics of line-tunneling FETs and investigated the pocket design to optimize the device performance. InAs with a low and direct bandgap of 0.37 eV was utilized to boost the on-current for the practical significance of the study. Without a laterally doped pocket, the point-tunneling is triggered earlier than the line-tunneling to cause a high subthreshold swing and low on-current in line-tunneling FETs. The laterally doped pocket properly modulates the vertical energy-band diagrams near the gate-oxide interface to narrow the tunneling barrier. With a laterally doped pocket, therefore, the line-tunneling can be triggered early to produce a low subthreshold swing and high on-current while still maintaining unchanged ambipolar behavior. The detailed investigation showed that the optimal concentration and thickness of laterally doped pocket are around 1E19 cm-3 and 4 nm, respectively. Both the pocket concentration and thickness are optimized at the values at which the onset voltage of line-tunneling is the same as that of point-tunneling. Using the laterally doped pocket with optimized design parameters is helpful in exploiting the advantages of line-tunneling in low-bandgap TFETs.

Presenter: Nguyễn Đăng Chiến

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